Description: As a DFM SiP/ PCBA NPI engineer, you will play a crucial role in developing next generation SiP process and PCBA assembly process for various of end products. You will be deeply involved from early design phase , prove-of-concept phase (POC), multiple NPI build phases, and hand over to MP team until risk ramp. During these phases, you will be the key stakeholder to lead OSAT’s process team for process development & qualification per projects assigned.This role partners closely with cross-functional engineering teams, suppliers, and factory operations to support NPI, equipment development, and high-volume manufacturing while meeting quality, cost, and delivery objectives. Responsibilities: Collaborate with cross functional teams, to define next-gen SiP architecture based on assessment of functionality / form factor / process capability Define general process flow and assess process risk per different options, co-work with internal RD team or OSAT team for early validation to de-risk and update risk level based on validation result Work with internal project management team, to define NPI timeline, detailed bring up plan, formal build plan, post build plan and etc. Take lead for process development in POC build & NPI build, drive OSAT process team to bring up each process steps (material down-selection, equipment qualification, tooling design, recipes fine tune), integrate as one robust process flow and deliver SiP with timely manner (based on NPI build plan) & high quality (yield, reliability) Work with EE team & REL team for process related FA, take lead of process trouble shooting, commonality study, corrective actions and drive till closure Drive OSAT team, material vendor, equipment vendor for potential process yield improvement, cost reduction, design rule improvement Minimum Qualifications: Bachelors or Masters degree in Mechanical engineering, Physics, Materials Science or equivalent 5 years of experience in IC packaging / Surface Mount Technology / Printed Circuit board assembly process Solid knowledge / experience in overall SiP process, panel level packaging process or wafer level packaging process, including SMT (surface mounting technology), underfill, die attach, wire bond, molding, dicing saw, Laser and sputter thin film materials Strong knowledge of SMT Processes, mechanical design, GD&T, Tolerance Analysis Preferred Qualifications Extensive experiences about transfer molding with fine pitch IC or sputter thin film processes for EMI shielding, in the context of high-volume semiconductor/packaging/electronics manufacturing Proven ability to lead internal or external team for assembly process development and qualification of semiconductor packages Good understanding and skill for material characterizations, semiconductor packaging, component failure analysis, design for experiments, mechanical simulation and data analysis (JMP) Ability to work under pressure with a wide range of people with varying degrees of experience Familiar with quality tools, including SPC, Cpk, data distribution, data correlation, commonality study and etc Excellent communication skills in English

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